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docs: add obsidian hwr docs
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theoleuthardt
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285
Digitaltechnik/1aus8Decoder.circ
Normal file
285
Digitaltechnik/1aus8Decoder.circ
Normal file
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@ -0,0 +1,285 @@
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<?xml version="1.0" encoding="UTF-8" standalone="no"?>
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<project source="2.7.1" version="1.0">
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This file is intended to be loaded by Logisim (http://www.cburch.com/logisim/).
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<lib desc="#Wiring" name="0"/>
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<lib desc="#Gates" name="1"/>
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<lib desc="#Plexers" name="2"/>
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<lib desc="#Arithmetic" name="3"/>
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<lib desc="#Memory" name="4">
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<tool name="ROM">
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<a name="contents">addr/data: 8 8
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0
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</a>
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</tool>
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</lib>
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<lib desc="#I/O" name="5"/>
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<lib desc="#Base" name="6">
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<tool name="Text Tool">
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<a name="text" val=""/>
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<a name="font" val="SansSerif plain 12"/>
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<a name="halign" val="center"/>
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<a name="valign" val="base"/>
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</tool>
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</lib>
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<main name="main"/>
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<options>
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<a name="gateUndefined" val="ignore"/>
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<a name="simlimit" val="1000"/>
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<a name="simrand" val="0"/>
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</options>
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<mappings>
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<tool lib="6" map="Button2" name="Menu Tool"/>
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<tool lib="6" map="Button3" name="Menu Tool"/>
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<tool lib="6" map="Ctrl Button1" name="Menu Tool"/>
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</mappings>
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<toolbar>
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<tool lib="6" name="Poke Tool"/>
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<tool lib="6" name="Edit Tool"/>
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<tool lib="6" name="Text Tool">
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<a name="text" val=""/>
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<a name="font" val="SansSerif plain 12"/>
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<a name="halign" val="center"/>
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<a name="valign" val="base"/>
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</tool>
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<sep/>
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<tool lib="0" name="Pin">
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<a name="tristate" val="false"/>
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</tool>
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<tool lib="0" name="Pin">
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<a name="facing" val="west"/>
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<a name="output" val="true"/>
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<a name="labelloc" val="east"/>
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</tool>
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<tool lib="1" name="NOT Gate"/>
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<tool lib="1" name="AND Gate"/>
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<tool lib="1" name="OR Gate"/>
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</toolbar>
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<circuit name="main">
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<a name="circuit" val="main"/>
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<a name="clabel" val=""/>
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<a name="clabelup" val="east"/>
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<a name="clabelfont" val="SansSerif plain 12"/>
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<appear>
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<path d="M61,51 Q65,61 69,51" fill="none" stroke="#808080" stroke-width="2"/>
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<rect fill="none" height="30" stroke="#000000" stroke-width="2" width="30" x="50" y="50"/>
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<circ-anchor facing="east" height="6" width="6" x="47" y="47"/>
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</appear>
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</circuit>
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<circuit name="1aus8Decoder">
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<a name="circuit" val="1aus8Decoder"/>
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<a name="clabel" val=""/>
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<a name="clabelup" val="east"/>
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<a name="clabelfont" val="SansSerif plain 12"/>
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<wire from="(400,750)" to="(400,820)"/>
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<wire from="(400,610)" to="(400,680)"/>
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<wire from="(400,470)" to="(400,540)"/>
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<wire from="(400,330)" to="(400,400)"/>
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<wire from="(290,460)" to="(290,530)"/>
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<wire from="(290,320)" to="(290,390)"/>
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<wire from="(140,670)" to="(140,740)"/>
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<wire from="(200,870)" to="(260,870)"/>
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<wire from="(200,910)" to="(260,910)"/>
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<wire from="(350,570)" to="(350,710)"/>
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<wire from="(350,430)" to="(350,570)"/>
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<wire from="(350,290)" to="(350,430)"/>
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<wire from="(160,200)" to="(210,200)"/>
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<wire from="(430,310)" to="(430,320)"/>
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<wire from="(240,240)" to="(290,240)"/>
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<wire from="(260,940)" to="(260,950)"/>
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<wire from="(180,500)" to="(180,640)"/>
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<wire from="(180,360)" to="(180,500)"/>
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<wire from="(180,640)" to="(180,780)"/>
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<wire from="(160,510)" to="(160,720)"/>
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<wire from="(290,240)" to="(290,320)"/>
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<wire from="(320,650)" to="(430,650)"/>
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<wire from="(320,590)" to="(430,590)"/>
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<wire from="(320,370)" to="(430,370)"/>
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<wire from="(320,310)" to="(430,310)"/>
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<wire from="(320,370)" to="(320,590)"/>
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<wire from="(140,740)" to="(430,740)"/>
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<wire from="(140,600)" to="(430,600)"/>
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<wire from="(490,520)" to="(530,520)"/>
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<wire from="(490,380)" to="(530,380)"/>
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<wire from="(490,660)" to="(530,660)"/>
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<wire from="(490,800)" to="(530,800)"/>
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<wire from="(180,160)" to="(210,160)"/>
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<wire from="(310,920)" to="(400,920)"/>
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<wire from="(400,820)" to="(430,820)"/>
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<wire from="(400,680)" to="(430,680)"/>
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<wire from="(400,540)" to="(430,540)"/>
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<wire from="(400,400)" to="(430,400)"/>
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<wire from="(160,720)" to="(430,720)"/>
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<wire from="(160,440)" to="(430,440)"/>
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<wire from="(290,460)" to="(430,460)"/>
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<wire from="(290,320)" to="(430,320)"/>
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<wire from="(240,200)" to="(320,200)"/>
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<wire from="(350,710)" to="(430,710)"/>
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<wire from="(350,570)" to="(430,570)"/>
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<wire from="(350,430)" to="(430,430)"/>
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<wire from="(350,290)" to="(430,290)"/>
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<wire from="(130,950)" to="(260,950)"/>
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<wire from="(400,680)" to="(400,750)"/>
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<wire from="(400,540)" to="(400,610)"/>
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<wire from="(400,400)" to="(400,470)"/>
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<wire from="(290,390)" to="(290,460)"/>
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<wire from="(140,740)" to="(140,810)"/>
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<wire from="(160,720)" to="(160,790)"/>
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<wire from="(140,600)" to="(140,670)"/>
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<wire from="(160,440)" to="(160,510)"/>
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<wire from="(180,780)" to="(430,780)"/>
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<wire from="(180,640)" to="(430,640)"/>
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<wire from="(180,500)" to="(430,500)"/>
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<wire from="(180,360)" to="(430,360)"/>
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<wire from="(350,160)" to="(350,290)"/>
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<wire from="(180,160)" to="(180,360)"/>
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<wire from="(130,160)" to="(180,160)"/>
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<wire from="(240,160)" to="(350,160)"/>
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<wire from="(130,870)" to="(170,870)"/>
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<wire from="(130,910)" to="(170,910)"/>
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<wire from="(260,870)" to="(260,900)"/>
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<wire from="(140,810)" to="(430,810)"/>
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<wire from="(140,670)" to="(430,670)"/>
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<wire from="(490,310)" to="(530,310)"/>
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<wire from="(490,450)" to="(530,450)"/>
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<wire from="(490,590)" to="(530,590)"/>
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<wire from="(490,730)" to="(530,730)"/>
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<wire from="(130,200)" to="(160,200)"/>
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<wire from="(400,820)" to="(400,920)"/>
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<wire from="(400,750)" to="(430,750)"/>
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<wire from="(400,330)" to="(430,330)"/>
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<wire from="(400,610)" to="(430,610)"/>
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<wire from="(400,470)" to="(430,470)"/>
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<wire from="(140,240)" to="(140,600)"/>
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<wire from="(320,200)" to="(320,310)"/>
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<wire from="(160,790)" to="(430,790)"/>
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<wire from="(160,510)" to="(430,510)"/>
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<wire from="(290,530)" to="(430,530)"/>
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<wire from="(290,390)" to="(430,390)"/>
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<wire from="(160,200)" to="(160,440)"/>
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<wire from="(130,240)" to="(140,240)"/>
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<wire from="(140,240)" to="(210,240)"/>
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<wire from="(320,310)" to="(320,370)"/>
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<wire from="(320,590)" to="(320,650)"/>
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<comp lib="1" loc="(490,520)" name="NAND Gate"/>
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<comp lib="6" loc="(89,203)" name="Text">
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<a name="text" val="A1"/>
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</comp>
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<comp lib="6" loc="(89,913)" name="Text">
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<a name="text" val="E2"/>
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</comp>
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<comp lib="1" loc="(200,870)" name="NOT Gate"/>
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<comp lib="0" loc="(530,380)" name="Pin">
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<a name="facing" val="west"/>
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<a name="output" val="true"/>
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<a name="labelloc" val="east"/>
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</comp>
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<comp lib="1" loc="(490,380)" name="NAND Gate"/>
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<comp lib="1" loc="(490,310)" name="NAND Gate"/>
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<comp lib="0" loc="(530,520)" name="Pin">
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<a name="facing" val="west"/>
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<a name="output" val="true"/>
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<a name="labelloc" val="east"/>
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</comp>
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<comp lib="1" loc="(490,800)" name="NAND Gate"/>
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<comp lib="0" loc="(530,730)" name="Pin">
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<a name="facing" val="west"/>
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<a name="output" val="true"/>
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<a name="labelloc" val="east"/>
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</comp>
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<comp lib="0" loc="(530,800)" name="Pin">
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<a name="facing" val="west"/>
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<a name="output" val="true"/>
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<a name="labelloc" val="east"/>
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</comp>
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<comp lib="6" loc="(88,164)" name="Text">
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<a name="text" val="A0"/>
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</comp>
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<comp lib="6" loc="(578,735)" name="Text">
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<a name="text" val="O7_N"/>
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</comp>
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<comp lib="0" loc="(130,950)" name="Pin">
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<a name="tristate" val="false"/>
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</comp>
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<comp lib="6" loc="(90,954)" name="Text">
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<a name="text" val="E3"/>
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</comp>
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<comp lib="1" loc="(310,920)" name="AND Gate"/>
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<comp lib="0" loc="(130,200)" name="Pin">
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<a name="tristate" val="false"/>
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</comp>
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<comp lib="1" loc="(200,910)" name="NOT Gate"/>
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<comp lib="1" loc="(490,450)" name="NAND Gate"/>
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<comp lib="0" loc="(130,240)" name="Pin">
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<a name="tristate" val="false"/>
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</comp>
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<comp lib="6" loc="(578,385)" name="Text">
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<a name="text" val="O1_N"/>
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</comp>
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<comp lib="1" loc="(240,240)" name="NOT Gate"/>
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<comp lib="1" loc="(240,200)" name="NOT Gate"/>
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<comp lib="1" loc="(240,160)" name="NOT Gate"/>
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<comp lib="6" loc="(90,244)" name="Text">
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<a name="text" val="A2"/>
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</comp>
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<comp lib="6" loc="(580,803)" name="Text">
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<a name="text" val="O8_N"/>
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</comp>
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<comp lib="0" loc="(130,870)" name="Pin">
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<a name="tristate" val="false"/>
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</comp>
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<comp lib="0" loc="(530,660)" name="Pin">
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<a name="facing" val="west"/>
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<a name="output" val="true"/>
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<a name="labelloc" val="east"/>
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</comp>
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<comp lib="6" loc="(136,63)" name="Text">
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<a name="text" val="1 aus 8 Decoder"/>
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<a name="font" val="SansSerif bold 20"/>
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</comp>
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<comp lib="6" loc="(88,874)" name="Text">
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<a name="text" val="E1"/>
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</comp>
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<comp lib="0" loc="(530,310)" name="Pin">
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<a name="facing" val="west"/>
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<a name="output" val="true"/>
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<a name="tristate" val="false"/>
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<a name="labelloc" val="east"/>
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</comp>
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<comp lib="1" loc="(490,590)" name="NAND Gate"/>
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<comp lib="1" loc="(490,730)" name="NAND Gate"/>
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<comp lib="0" loc="(530,450)" name="Pin">
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<a name="facing" val="west"/>
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<a name="output" val="true"/>
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<a name="labelloc" val="east"/>
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</comp>
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<comp lib="6" loc="(580,314)" name="Text">
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<a name="text" val="O0_N"/>
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</comp>
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<comp lib="0" loc="(530,590)" name="Pin">
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<a name="facing" val="west"/>
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<a name="output" val="true"/>
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<a name="tristate" val="false"/>
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<a name="labelloc" val="east"/>
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</comp>
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<comp lib="6" loc="(580,592)" name="Text">
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<a name="text" val="O5_N"/>
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</comp>
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<comp lib="1" loc="(490,660)" name="NAND Gate"/>
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<comp lib="6" loc="(580,525)" name="Text">
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<a name="text" val="O4_N"/>
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</comp>
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<comp lib="6" loc="(578,663)" name="Text">
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<a name="text" val="O6_N"/>
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</comp>
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<comp lib="0" loc="(130,160)" name="Pin">
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<a name="tristate" val="false"/>
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</comp>
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<comp lib="6" loc="(578,457)" name="Text">
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<a name="text" val="O3_N"/>
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</comp>
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<comp lib="0" loc="(130,910)" name="Pin">
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<a name="tristate" val="false"/>
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</comp>
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</circuit>
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</project>
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